Recently, the aggressive cost and power reductions from CMOS-SoC (Complementary Metal-Oxide-Semiconductor System on a Chip) innovations have motivated the search for new multi-gigahertz transceiver architecture based on a digitally intensive approach. Offering an excellent timing accuracy at high frequencies, and superior to the voltage resolution of an analog domain, the digital approach is opening areas of investigation related to all-digital transceiver architectures where signals are processed digitally all the way through the transmitter and receiver paths.